DDR3 SDRAM

Third generation of double data rate synchronous dynamic random access memory
the computer main memory

Double Data Rate 3 Synchronous Dynamic Random Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random access memory (SDRAM) with a high bandwidth ("double data rate") interface, and has been in use since 2007. It is the higher speed successor to DDR and DDR2 and predecessor to DDR4 synchronous dynamic random access memory (SDRAM) chips. DDR3 SDRAM is neither forward nor backward compatible with any earlier type of random access memory (RAM) because of different signaling voltages, timings, and other factors. DDR3 is a DRAM interface specification. The actual DRAM arrays that store the data are similar to earlier types, with similar performance. The primary benefit of DDR3 SDRAM over its immediate predecessor DDR2 SDRAM, is its ability to transfer data at twice the rate (eight times the speed of its internal memory arrays), enabling higher bandwidth or peak data rates. The DDR3 standard permits DRAM chip capacities of up to 8 gigabits (Gbit), and up to four ranks of 64 bits each for a total maximum of 16 gigabytes (GB) per DDR3 DIMM. Because of a hardware limitation not fixed until Ivy Bridge E in 2013, most older Intel CPUs only support up to 4 Gbit chips for 8 GB DIMMs (Intel's Core 2 DDR3 chipsets only support up to 2 Gbit). All AMD CPUs correctly support the full specification for 16 GB DDR3 DIMMs.

In February 2005, Samsung introduced the first prototype DDR3 memory chip. Samsung played a major role in the development and standardisation of DDR3. In May 2005, Desi Rhoden, chairman of the JEDEC committee, stated that DDR3 had been under development for "about 3 years". DDR3 was officially launched in 2007, but sales were not expected to overtake DDR2 until the end of 2009 or possibly early 2010, according to Intel strategist Carlos Weissenberg, speaking during the early part of their roll out in August 2008. (The same timescale for market penetration had been stated by market intelligence company DRAMeXchange over a year earlier in April 2007, and by Desi Rhoden in 2005.

In September 2012, JEDEC released the final specification of DDR4. The primary benefits of DDR4 compared to DDR3 include a higher standardized range of clock frequencies and data transfer rates and significantly lower voltage.

Compared to DDR2 memory, DDR3 memory uses less power. Some manufacturers further propose using "dual gate" transistors to reduce leakage of current. According to JEDEC, 1.575 volts should be considered the absolute maximum when memory stability is the foremost consideration, such as in servers or other mission critical devices. In addition, JEDEC states that memory modules must withstand up to 1.80 volts before incurring permanent damage, although they are not required to function correctly at that level. In February 2005, Samsung demonstrated the first DDR3 memory prototype, with a capacity of 512Mb and a bandwidth of 1.066Gbps. Products in the form of motherboards appeared on the market in June 2007 based on Intel's P35 "Bearlake" chipset with DIMMs at bandwidths up to DDR3 1600 (PC3 12800). The Intel Core i7, released in November 2008, connects directly to memory rather than via a chipset. The Core i7, i5 & i3 CPUs initially supported only DDR3. AMD's socket AM3 Phenom II X4 processors, released in February 2009, were their first to support DDR3 (while still supporting DDR2 for backwards compatibility).

DDR3 dual inline memory modules (DIMMs) have 240 pins and are electrically incompatible with DDR2. A key notch—located differently in DDR2 and DDR3 DIMMs—prevents accidentally interchanging them. Not only are they keyed differently, but DDR2 has rounded notches on the side and the DDR3 modules have square notches on the side. DDR3 SO DIMMs have 204 pins. For the Skylake microarchitecture, Intel has also designed a SO DIMM package named UniDIMM, which can use either DDR3 or DDR4 chips. The CPU's integrated memory controller can then work with either. The purpose of UniDIMMs is to handle the transition from DDR3 to DDR4, where pricing and availability may make it desirable to switch RAM type. UniDIMMs have the same dimensions and number of pins as regular DDR4 SO DIMMs, but the notch is placed differently to avoid accidentally using in an incompatible DDR4 SO DIMM socket.

Power consumption of individual SDRAM chips (or, by extension, DIMMs) varies based on many factors, including speed, type of usage, voltage, etc. Dell's Power Advisor calculates that 4 GB ECC DDR1333 RDIMMs use about 4 W each. By contrast, a more modern mainstream desktop oriented part 8 GB, DDR3/1600 DIMM, is rated at 2.58 W, despite being significantly faster.

DDR3 memory utilizes serial presence detect. Serial presence detect (SPD) is a standardized way to automatically access information about a computer memory module, using a serial interface. It is typically used during the power on self test for automatic configuration of memory modules.

Release 4 of the DDR3 Serial Presence Detect (SPD) document (SPD4 01 02 11) adds support for Load Reduction DIMMs and also for 16b SO DIMMs and 32b SO DIMMs. JEDEC Solid State Technology Association announced the publication of Release 4 of the DDR3 Serial Presence Detect (SPD) document on September 1, 2011.

Intel Corporation officially introduced the eXtreme Memory Profile (XMP) Specification on March 23, 2007, to enable enthusiast performance extensions to the traditional JEDEC SPD specifications for DDR3 SDRAM.

In addition to bandwidth designations (e. g. DDR3 800D), and capacity variants, modules can be one of the following:
ECC memory, which has an extra data byte lane used for correcting minor errors and detecting major errors for better reliability. Modules with ECC are identified by an additional ECC or E in their designation. For example: "PC3 6400 ECC", or PC3 8500E. Registered or buffered memory, which improves signal integrity (and hence potentially clock rates and physical slot capacity) by electrically buffering the signals with a register, at a cost of an extra clock of increased latency. Those modules are identified by an additional R in their designation, for example PC3 6400R. Non registered (a. k. a. "unbuffered") RAM may be identified by an additional U in the designation. The DDR3L standard is 1.35 V and has the label PC3L for its modules. Examples include DDR3L‐800 (PC3L 6400), DDR3L‐1066 (PC3L 8500), DDR3L‐1333 (PC3L 10600), and DDR3L‐1600 (PC3L 12800). Memory specified to DDR3L and DDR3U specifications is compatible with the original DDR3 standard, and can run at either the lower voltage or at 1.50 V. However, devices that require DDR3L explicitly, which operate at 1.35 V, such as systems using mobile versions of fourth generation Intel Core processors, are not compatible with 1.50 V DDR3 memory. DDR3L is different from and incompatible with the LPDDR3 mobile memory standard. The DDR3U (DDR3 Ultra Low Voltage) standard is 1.25 V and has the label PC3U for its modules. JEDEC Solid State Technology Association announced the publication of JEDEC DDR3L on July 26, 2010 and the DDR3U in October 2011.