Nord 10: Норвежский 16-разрядный мини-компьютер

Nord 10 was a medium sized general purpose 16 bit minicomputer designed for multilingual time sharing applications and for real time multi program systems, produced by Norsk Data. It was introduced in 1973. The later follow up model, Nord 10/S, introduced in 1975, introduced CPU cache, paging, and other miscellaneous improvements. The CPU had a microprocessor, which was defined in the manual as a portmanteau of microcode processor, not to be confused with the then nascent microprocessor. The CPU additionally contained instructions, operator communication, bootstrap loaders, and hardware test programs, that were implemented in a 1K read only memory. The microprocessor also allowed for customer specified instructions to be built in. Nord 10 had a memory management system with hardware paging extending the memory size from 64 to 256K 16 bit words and two independent protecting systems, one acting on each page and one on the mode of instructions. The interrupt system had 16 program levels in hardware, each with its own set of general purpose registers. Note: Much of the following information is taken from a document written by Norsk Data introducing the Nord 10. Some information, particularly about the memory system, may be inaccurate for the later Nord 10/S.

The central processing unit (CPU) consisted of a total 24 printed circuit boards. The last eight positions in the rack were used for input/output (I/O) devices operated by program control, such as the console teleprinter (teletype), paper punched tape and punched card reader and punch, line printer, display, operator's panel, and a real time clock. The Nord 10 had 160 processor registers, of which 128 were available to programs, eight on each of the 16 program levels. Six of those registers were general registers, one was the program counter, and the other contained status information. Floating point arithmetic operations were standard. The instructions could operate on five different formats, a bit, an 8 bit byte, 16 bit words, 32 bit double words, and 48 bit floating point words.

The random access memory system of the first Nord 10s were built up of 8K 16 bit modules housed in a special memory rack. One 19 inch rack could hold up to eight 8K modules. It was possible to extend the Nord 10's physical address space beyond 64K up to a maximum of 256K 16 bit words. The paging system translated a 16 bit virtual address into an 18 bit physical address. The hardware paging system made it possible for one user to write programs up to 64K (virtual memory), and only parts of the program to be present in physical memory at any time (using dynamic memory allocation). The paging system divided memory into 1K pages. The four page index tables were found in a 256 word extremely fast memory block. The calculation of a physical address resulted in no appreciable delay in the effective memory cycle time. The Nord 10 had two independent protection systems. Each individual page could be protected against being read from, written into (type data or type instructions), or against reading of instructions. In addition, there was a system which divided the pages into four different categories, called rings. The rings had a priority from 0 to 3. A program on a lower ring was never allowed to access the pages on a higher ring. Programs which ran on rings 2 and 3 could use the whole Nord 10 instruction set, while programs on rings 0 and 1 only had a limited instruction set available. The different rings were displayed on the operator's panel. For example, ring 0 (User) may have held a user program, while compilers and assemblers ran in ring 1 (Protected User). The bulk of the operating system could run in ring 2 (System), and the kernel in ring 3 (Protected System). If one attempted to execute privileged instructions in ring 0 or 1, or attempts were made to accessed a protected page, a hardware status interrupt would automatically be generated on program level 14 indicating the error.

The NORD 10 was equipped with a common bus system for all external peripheral devices. The bus system was divided into groups, and a great deal of effort had been made to ensure that no device would be able to jam the bus system in the case of malfunction. Each group had its own controller which in addition to functioning as an electronic switch for the bus system, could also change priority for the whole group. All interconnections between the cards were done with multilayer printed circuit backwiring boards, and all input/output interface had the same standard form. The system could therefore be extended or reconfigured by plugging in new or shifting around the existing interface cards. The position of the device interface in the card rack determined the interrupt priority of the device. In direct memory access transfers the device would send a request. The CPU would answer with a grant signal, which would be passed from device to device until it came to the device which initiated the request, and transfer to the memory could take place. When two or more devices request a DMA request simultaneously to the CPU had the highest priority. One memory cycle later the next DMA along the chain would be allowed to send data, and so on, until a higher priority device again sent a request. This meant that many DMA devices could use the same bus system at the full data transfer rate. It was not necessary to establish a master slave connection. The transfer was one 16 bit word/850 nanoseconds, or 2.2 MB/s. The printed backplane of the I/O bus was modular in groups of 8 interface slots. Interfaces for mass storages as disk, drum, magnetic tape, etc., were built with one interface card to be plugged at the appropriate place in the bus system, the remaining control cards (6 7) were placed in one of the backplane modules.

The Nord 10 had a multi program system with 16 priority program levels. Each program level had its own set of registers, including a program counter and a status word. The levels running could be shown on the front panel by pressing the button "active levels". Levels 0 through 9 were used for programs. Internal hardware status interrupts were assigned to level 14, whilst level 15 was reserved for extremely fast user interrupts (this was colloquially called the "synchrotron level", since the only program ever to have used it was the program controlling the synchrotron at CERN)

Levels 10, 11, 12, and 13 were reserved for external devices. Each device had its own unique identification vector. In all 2048 such vectors were available. The "ident" instruction determined which device was giving an interrupt. The identification of an interrupt took 1.7 microseconds, including the time taken to enable and disable the registers.

The Nord 10 was delivered with a time shared system, Nord TSS, and a real time multitasking operating system, Sintran III. The minimum configuration for Sintran III included a standard Nord 10 with 8K of magnetic core memory. With NORD TSS all users could simultaneously run any of the systems Fortran IV, BASIC, MAC Assembler, NODAL, NORD PL, or QED.

There are several Nord 10 and Nord 10/S systems known to remain, many of which are in near operational condition, and several are in the care of NODAF. Restorations of systems are planned in both Oslo by NODAF and Trondheim by Norwegian University of Science and Technology. Its predecessor was the Nord 1 and its successor the Nord 100.