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Register in which intermediate arithmetic and logic results of a CPU are stored

In a computer's central processing unit (CPU), the accumulator is a register in which intermediate arithmetic logic unit results are stored. Without a register like an accumulator, it would be necessary to write the result of each calculation (addition, multiplication, shift, etc.) to cache or main memory, perhaps only to be read right back again for use in the next operation. Accessing memory is slower than accessing a register like an accumulator because the technology used for the large main memory is slower (but cheaper) than that used for a register. Early electronic computer systems were often split into two groups, those with accumulators and those without. Modern computer systems often have multiple general purpose registers that can operate as accumulators, and the term is no longer as common as it once was. However, to simplify their design, a number of special purpose processors still use a single accumulator.

An accumulator machine, also called a 1 operand machine, or a CPU with accumulator based architecture, is a kind of CPU where, although it may have several registers, the CPU mostly stores the results of calculations in one special register, typically called "the accumulator". Almost all computers were accumulator machines with only the high performance "supercomputers" having multiple registers. Then as mainframe systems gave way to microcomputers, accumulator architectures were again popular with the MOS 6502 being a notable example. Many 8 bit microcontrollers that are still popular as of 2014, such as the PICmicro and 8051, are accumulator based machines. Modern CPUs are typically 2 operand or 3 operand machines. The additional operands specify which one of many general purpose registers (also called "general purpose accumulators") are used as the source and destination for calculations. These CPUs are not considered "accumulator machines". The characteristic that distinguishes one register as being the accumulator of a computer architecture is that the accumulator (if the architecture were to have one) would be used as an implicit operand for arithmetic instructions. For instance, a CPU might have an instruction like: ADD memaddress that adds the value read from memory location memaddress to the value in the accumulator, placing the result back in the accumulator. The accumulator is not identified in the instruction by a register number; it is implicit in the instruction and no other register can be specified in the instruction. Some architectures use a particular register as an accumulator in some instructions, but other instructions use register numbers for explicit operand specification.

The 1945 configuration of ENIAC had 20 accumulators, which could operate in parallel. Each one could store an eight decimal digit number and add to it (or subtract from it) a number it received. The PDP 8 had but one accumulator. The HP 2100 and Data General Nova had 2 and 4 accumulators. The Nova was created when this follow on to the PDP 8 was rejected in favor of what would become the PDP 11. The Nova provided four accumulators, AC0 AC3, although AC2 and AC3 could also be used to provide offset addresses, tending towards more generality of usage for the registers. The PDP 11 had 8 general purpose registers, along the lines of the System/360 and PDP 10; most later CISC and RISC machines provided multiple general purpose registers. Early 4 bit and 8 bit microprocessors such as the 4004, 8008 and numerous others, typically had single accumulators. The 8051 microcontroller has two, a primary accumulator and a secondary accumulator, where the second is used by instructions only when multiplying (MUL AB) or dividing (DIV AB); the former splits the 16 bit result between the two 8 bit accumulators, whereas the latter stores the quotient on the primary accumulator A and the remainder in the secondary accumulator B. As a direct descendant of the 8008, the 8080, and the 8086, the modern ubiquitous Intel x86 processors still uses the primary accumulator EAX and the secondary accumulator EDX for multiplication and division of large numbers. For instance, MUL ECX will multiply the 32 bit registers ECX and EAX and split the 64 bit result between EAX and EDX. However, MUL and DIV are special cases; other arithmetic logical instructions (ADD, SUB, CMP, AND, OR, XOR, TEST) may specify any of the eight registers EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI as the accumulator (i. e. left operand and destination). This is also supported for multiply if the upper half of the result is not required. x86 is thus a fairly general register architecture, despite being based on an accumulator model. The 64 bit extension of x86, x86 64, has been further generalized to 16 instead of 8 general registers.