NS32000: 32-битный микропроцессор National Semiconductor.

32 bit microprocessor

The NS32000, sometimes known as the 32k, is a series of microprocessors produced by National Semiconductor. The first member of the family came to market in 1982, briefly known as the 16032 before becoming the 32016. It was the first general purpose microprocessor on the market that used 32 bit data throughout: the Motorola 68000 used 32 bit data but had a 16 bit ALU and thus took twice as long perform many operations. The VAX is well known for its highly "orthogonal" instruction set architecture (ISA), in which any instruction can be applied to any data. For instance, an ADD instruction might add the contents of two processor registers, or one register against a value in memory, two values in memory, or use the register as an offset against an address. This flexibility was considered the paragon of design in the era of complex instruction set computers (CISC). At the same time, National Semiconductor also announced two future versions, the NS32032 and NS32132. The former was essentially a version of the NS16032 with a 32 bit external data bus, allowing it to read data at twice the rate. This was project to be released in 1984. The NS32132 was a version with a 29 bit internal addresses and 32 bit external, allowing it to address a complete 4 GB of memory. It was to be released in 1985. Although a 1982 introduction post dates the 68k by about two years, the 68k was not yet being widely used in the market and the 32016 generated significant interest. Unfortunately, the early versions were filled with bugs and could rarely be run at their rated speed. By 1984, after two years, the errata list still contained items specifying uncontrollable conditions that would result in the processor coming to a halt, forcing a reset. The original product roadmap envisaged 6 MHz and 10 MHz parts during 1983 and 12 MHz and 14 MHz parts during 1984. However, press reports in 1984 indicated difficulties in keeping to this roadmap, with it reportedly having taken five months to increase the frequency of the parts from 6 MHz to 8 MHz, and with representatives estimating a further "two, three or five months" to increase the frequency to 10 MHz. Two unspecified chips of the five in the chipset were reported to be the cause of these problems. An early 1985 article about the 32016 based Whitechapel MG 1 workstation noted that the 32081 memory management unit was "suffering from bugs" and had been situated on its own board providing hardware fixes. In 1986, Texas Instruments announced a "fully qualified 10 MHz TI32000 32 bit microprocessor chip set" consisting of the TI32016 CPU and TI32082 memory management unit as 48 pin devices, the TI32201 timing control unit and TI32081 floating point unit as 24 pin devices, and the TI32202 interrupt control unit as a 40 pin device, with the five device chipset "priced at $289 in 100 unit quantities". National changed its design methodology to make it possible to get the part into production and a design system based on the language "Z" was co developed with the University of Tel Aviv, close to the "NSC" design centre in Herzliya, Israel. The "Z" language is similar to today's Verilog and VHDL, but has a Pascal like syntax and is optimized for two phase clock designs. However, by the times the fruit of these efforts were being felt in the design, numerous 68k machines were already on the market, notably the Apple Macintosh, and the 32016 never saw widespread use. The 32016 has a 16 bit external data bus, a 24 bit external address bus, and a full 32 bit instruction set. It also includes a coprocessor interface, allowing coprocessors such as FPUs and MMUs to be attached as peers to the main processor. The MMU is based on demand paging Virtual Memory, which is the most unusual feature compared to the segmented memory approach used by the competition, and has become the standard for how microprocessors are designed today. The architecture supports an instruction restart mechanism on a page fault, which is much cleaner than the Motorola approach to dump the internal status on a page fault, which has to be read back, before the instruction is continued. While often compared to the 68k's instruction set, this was rejected by NSC employees; one of the key marketing phrases of the time was "Elegance is Everything", comparing the highly orthogonal Series 32000 to the "kludge". One key difference is Motorola's use of address registers and data registers, with instructions only working on either address or data registers. The Series 32000 has general purpose registers, described as "address data" registers in technical documentation.

The 32032 was introduced in 1984. It is almost completely compatible with the 32016, but features a 32 bit data bus (although keeping the 24 bit address bus) for somewhat faster performance, described as "minicomputer performance" comparable with that of a VAX 11 system. There was also a 32008, a 32016 with a data bus cut down to 8 bits wide for low cost applications. It is philosophically similar to the MC68008, and equally unpopular. National also produced a series of related support chips like the NS32081 Floating Point Unit (FPU), NS32082 Memory Management Units (MMUs), NS32203 Direct Memory Access (DMA) and NS32202 Interrupt Controllers. With the full set plus memory chips and peripherals, it was feasible to build a 32 bit computer system capable of supporting modern multi tasking operating systems, something that had previously been possible only on expensive minicomputers and mainframes.

In 1985, National Semi introduced the NS32332, a much improved version of the 32032. From the datasheet, the enhancements include "the addition of new dedicated addressing hardware (consisting of a high speed ALU, a barrel shifter and an address register), a very efficient increased (20 bytes) instruction prefetch queue, a new system/memory bus interface/protocol, increased efficiency slave processor protocol and finally enhancements of microcode." There was also a new NS32382 MMU, NS32381 FPU and the (very rare) NS32310 interface to a Weitek FPA. The aggregate performance boost of the NS32332 from these enhancements only made it 50 percent faster than the original NS32032, and therefore less than that of the main competitor, the MC68020. National Semi introduced the NS32532 in early 1987. Running at 20 , 25 & 30 MHz, it was a complete redesign of the internal implementation with a five stage pipeline, an integrated Cache/MMU and improved memory performance, making it about twice as performant as the competing MC68030 and i80386. At this stage RISC architectures were starting to make inroads, and the main competitors became the now equally dead AM29000 and MC88000, which was considered faster than the NS32532. For floating point, the NS32532 used the existing NS32381 or the NS32580 interface to a Weitek FPA. The NS32532 was the basis of the PC532, a "public domain" hardware project, and one of the few to produce a useful machine running a real operating system (in this case, Minix or NetBSD). The semi mythical NS32732 (sometimes called NS32764), envisioned as the high performance successor to the NS32532, never came to the market.

A derivative of the NS32732 called Swordfish was aimed at embedded systems and arrived in about 1990. Swordfish has an integrated floating point unit, timers, DMA controllers and other peripherals not normally available in microprocessors. It has a 64 bit data bus and is internally overclocked from 25 to 50 MHz. The chief architect of the Swordfish is Donald Alpert, who went on to manage the architectural team designing the Pentium. The Pentium internal microarchitecture is similar to the preceding Swordfish. The focus of Swordfish was high end Postscript laser printers, and performance was exceptional at the time. Competing solutions could render about one new page per minute, but the Swordfish demo unit would print out sixteen pages per minute, limited only by the laser engine mechanics. On each page it would print out how much time it was idling, waiting for the engine to complete. The Swordfish die is huge, and it was eventually decided to drop the project altogether, and the product never went into production. The lessons from the Swordfish were used for the CompactRISC designs. In the beginning, there were both a CompactRISC 32 and a CompactRISC 16, designed using "Z". National never brought a chip to the market with the CompactRISC 32 core. National's Research department worked with the University of Michigan to develop the first synthesizable Verilog Model, and Verilog was used from the CR16C and onwards.

In June 2015, Udo Möller released a complete Verilog implementation of an NS32000 processor on OpenCores. Fully software compatible with an NS32532 CPU with N32381 FPU, it is significantly faster when implemented on an FPGA, both operating at a higher clock rate and using fewer cycles per instruction.