Жапырақшалы монтаждық интегралдық схемалар түрлері

Surface mount variant of DIP

A small outline integrated circuit (SOIC) is a surface mounted integrated circuit (IC) package which occupies an area about 30–50% less than an equivalent dual in line package (DIP), with a typical thickness being 70% less. They are generally available in the same pin outs as their counterpart DIP ICs. The convention for naming the package is SOIC or SO followed by the number of pins. For example, a 14 pin 4011 would be housed in an SOIC 14 or SO 14 package.

The SOIC package is shorter and narrower than DIP, the side to side pitch being 6 mm for an SOIC 14 (from lead tip to lead tip), and the body width being 3.9 mm. These dimensions differ depending on the SOIC in question, and there are several variants. This package has "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 in (1.27 mm).

These are sometimes called "wide SOIC", as opposed to the narrower JEDEC MS 012, but they in turn are narrower than the JEDEC MS 013, which may also be called "wide SOIC". Package WB WL SOIC 8 5.41 (5.16) 8.07 (7.67)
Next to the narrow SOIC package (commonly represented as SOx N or SOICx N, where x is the number of pins), there's also the wide (or sometimes called extended) version. This package is commonly represented as SOx W or SOICx W.

The difference is mainly related to the parameters WB and WL. As an example, the values WB and WL are given for an 8 pins wide (extended) SOIC package.

Package WB WL H C L P LL T LW miniSOIC 10 3.0 4.9 1.09 0.10 3.0 0.5 0.95 0.19 0.23
Another SOIC variant, available only for 8 pin and 10 pin ICs, is the mini SOIC, also called micro SOIC. This case is much smaller, with a pitch of only 0.5 mm. See the table for the 10 pin model. An excellent overview of different semiconductor packages is provided by National Semiconductor.

Small outline J leaded package (SOJ) is a version of SOIC with J type leads instead of gull wing leads.

Shrink small outline package (SSOP) chips have "gull wing" leads protruding from the two long sides, and a lead spacing of 0.0256inches (0.65mm) or 0.025inches (0.635mm). 0.5mm lead spacing is less common, but not rare. The body size of a SOP was compressed and the lead pitch tightened to obtain a smaller version SOP. This yields an IC package with a significant reduction in the size compared to standard package. All IC assembly processes remain the same as with standard SOPs. Applications for a SSOP enable end products (pagers, portable audio/video, disc drives, radio, RF devices/components, telecom) to be reduced in size and mass. Semiconductor families such as operational amplifiers, drivers, optoelectronics, controllers, logic, analog, memory, comparators and more using BiCMOS, CMOS or other silicon / GaAs technologies are well addressed by the SSOP product family.

A thin small outline package (TSOP) is a rectangular, thin bodied component. A Type I TSOP has legs protruding from the width portion of the package. A Type II TSOP has the legs protruding from the length portion of the package. The ICs on DRAM memory modules were usually TSOPs until they were replaced by ball grid array (BGA).

A thin shrink small outline package (TSSOP) is a rectangular, thin body component. A TSSOP's leg count can range from 8 to 64. TSSOPs are particularly suited for gate drivers, controllers, wireless / RF, op amps, logic, analog, ASICs, memory (EPROM, E2PROM), comparators and optoelectronics. Memory modules, disk drives, recordable optical disks, telephone handsets, speed dialers, video / audio and consumer electronics / appliances are suggested uses for TSSOP packaging.

The exposed pad (EP) variant of small outline packages can increase heat dissipation by as much as 1.5 times over a standard TSSOP, thereby expanding the margin of operating parameters. Additionally, the exposed pad can be connected to ground, thereby reducing loop inductance for high frequency applications. The exposed pad should be soldered directly to the PCB to realize the thermal and electrical benefits.