Active-pixel sensor

Image sensor, consisting of an integrated circuit
An active pixel sensor (APS) is an image sensor, which was invented by Peter J. W. Noble in 1968, where each pixel sensor unit cell has a photodetector (typically a pinned photodiode) and one or more active transistors. CMOS sensors emerged as an alternative to charge coupled device (CCD) image sensors and eventually outsold them by the mid 2000s. The term active pixel sensor is also used to refer to the individual pixel sensor itself, as opposed to the image sensor. In this case, the image sensor is sometimes called an active pixel sensor imager, or active pixel image sensor.

While researching metal–oxide–semiconductor (MOS) technology, Willard Boyle and George E. Smith realized that an electric charge could be stored on a tiny MOS capacitor, which became the basic building block of the charge couple device (CCD), which they invented in 1969. An issue with CCD technology was its need for nearly perfect charge transfer in read out, which, "makes their radiation [tolerance?] 'soft', difficult to use under low light conditions, difficult to manufacture in large array sizes, difficult to integrate with on chip electronics, difficult to use at low temperatures, difficult to use at high frame rates, and difficult to manufacture in non silicon materials that extend wavelength response." At RCA Laboratories, a research team including Paul K. Weimer, W. S. Pike and G. Sadasiv in 1969 proposed a solid state image sensor with scanning circuits using thin film transistors (TFTs), with photoconductive film used for the photodetector. A low resolution "mostly digital" N channel MOSFET (NMOS) imager with intra pixel amplification, for an optical mouse application, was demonstrated by Richard F. Lyon in 1981. Another type of image sensor technology that is related to the APS is the hybrid infrared focal plane array (IRFPA), and then publicly reported by Teranishi and Ishihara with A. Kohono, E. Oda and K. Arai in 1982, with the addition of an anti blooming structure. The pinned photodiode is a photodetector structure with low lag, low noise, high quantum efficiency and low dark current. In a photodiode array, pixels contain a p n junction, integrated capacitor, and MOSFETs as selection transistors. A photodiode array was proposed by G. Weckler in 1968, predating the CCD. which had image sensor elements with in pixel selection transistors, proposed by Peter J. W. Noble in 1968,

Passive pixel sensors were being investigated as a solid state alternative to vacuum tube imaging devices. The MOS passive pixel sensor used just a simple switch in the pixel to read out the photodiode integrated charge. Pixels were arrayed in a two dimensional structure, with an access enable wire shared by pixels in the same row, and output wire shared by column. At the end of each column was a transistor. Passive pixel sensors suffered from many limitations, such as high noise, slow readout, and lack of scalability. Early (1960s–1970s) photodiode arrays with selection transistors within each pixel, along with on chip multiplexer circuits, were impractically large. The noise of photodiode arrays was also a limitation to performance, as the photodiode readout bus capacitance resulted in increased read noise level. Correlated double sampling (CDS) could also not be used with a photodiode array without external memory. It was not possible to fabricate active pixel sensors with a practical pixel size in the 1970s, due to limited microlithography technology at the time. The first MOS APS was fabricated by Tsutomu Nakamura's team at Olympus in 1985. The term active pixel sensor (APS) was coined by Nakamura while working on the CMD active pixel sensor at Olympus. The CMD imager had a vertical APS structure, which increases fill factor (or reduces pixel size) by storing the signal charge under an output NMOS transistor. Other Japanese semiconductor companies soon followed with their own active pixel sensors during the late 1980s to early 1990s. Between 1988 and 1991, Toshiba developed the "double gate floating surface transistor" sensor, which had a lateral APS structure, with each pixel containing a buried channel MOS photogate and a PMOS output amplifier. Between 1989 and 1992, Canon developed the base stored image sensor (BASIS), which used a vertical APS structure similar to the Olympus sensor, but with bipolar transistors rather than MOSFETs. while active pixel sensors began being used for low resolution high function applications such as retina simulation and high energy particle detectors. However, CCDs continued to have much lower temporal noise and fixed pattern noise and were the dominant technology for consumer applications such as camcorders as well as for broadcast cameras, where they were displacing video camera tubes. In 1993, the first practical APS to be successfully fabricated outside of Japan was developed at NASA's Jet Propulsion Laboratory (JPL), which fabricated a CMOS compatible APS. It had a lateral APS structure similar to the Toshiba sensor, but was fabricated with CMOS rather than PMOS transistors. The CMOS sensor with PPD technology was further advanced and refined by R. M. Guidash in 1997, K. Yonemoto and H. Sumi in 2000, and I. Inoue in 2003. This led to CMOS sensors achieve imaging performance on par with CCD sensors, and later exceeding CCD sensors. The video industry switched to CMOS cameras with the advent of high definition video (HD video), as the large number of pixels would require significantly higher power consumption with CCD sensors, which would overheat and drain batteries. CMOS sensors went on to have a significant cultural impact, leading to the mass proliferation of digital cameras and camera phones, which bolstered the rise of social media and selfie culture, and impacted social and political movements around the world. In recent years, the CMOS sensor technology has spread to medium format photography with Phase One being the first to launch a medium format digital back with a Sony built CMOS sensor. In 2012, Sony introduced the stacked CMOS BI sensor. Boyd Fowler of OmniVision is known for his work in CMOS image sensor development. His contributions include the first digital pixel CMOS image sensor in 1994; the first scientific linear CMOS image sensor with single electron RMS read noise in 2003; the first multi megapixel scientific area CMOS image sensor with simultaneous high dynamic range (86 dB), fast readout (100 frames/second) and ultra low read noise (1.2e RMS) (sCMOS) in 2010. He also patented the first CMOS image sensor for inter oral dental X rays with clipped corners for better patient comfort. By the late 2010s CMOS sensors had largely if not completely replaced CCD sensors, as CMOS sensors can not only be made in existing semiconductor production lines, reducing costs, but they also consume less power, just to name a few advantages. (see below)

HV CMOS devices are a specialty case of ordinary CMOS sensors used in high voltage applications (for detection of high energy particles) like CERN Large Hadron Collider where a high breakdown voltage up to ~30 120V is necessary. Such devices are not used for high voltage switching though. A CMOS sensor also typically has better control of blooming (that is, of bleeding of photo charge from an over exposed pixel into other nearby pixels). In three sensor camera systems that use separate sensors to resolve the red, green, and blue components of the image in conjunction with beam splitter prisms, the three CMOS sensors can be identical, whereas most splitter prisms require that one of the CCD sensors has to be a mirror image of the other two to read out the image in a compatible order. Unlike CCD sensors, CMOS sensors have the ability to reverse the addressing of the sensor elements. CMOS Sensors with a film speed of ISO 4 million exist.

Since a CMOS sensor typically captures a row at a time within approximately 1/60 or 1/50 of a second (depending on refresh rate) it may result in a "rolling shutter" effect, where the image is skewed (tilted to the left or right, depending on the direction of camera or subject movement). For example, when tracking a car moving at high speed, the car will not be distorted but the background will appear to be tilted. A frame transfer CCD sensor or "global shutter" CMOS sensor does not have this problem; instead it captures the entire image at once into a frame store. A long standing advantage of CCD sensors has been their capability for capturing images with lower noise. With improvements in CMOS technology, this advantage has closed as of 2020, with modern CMOS sensors available capable of outperforming CCD sensors. The active circuitry in CMOS pixels takes some area on the surface which is not light sensitive, reducing the photon detection efficiency of the device (microlenses and back illuminated sensors can mitigate this problem). But the frame transfer CCD also has about half the non sensitive area for the frame store nodes, so the relative advantages depend on which types of sensors are being compared.

The standard CMOS APS pixel consists of a photodetector (pinned photodiode), The pinned photodiode was originally used in interline transfer CCDs due to its low dark current and good blue response, and when coupled with the transfer gate, allows complete charge transfer from the pinned photodiode to the floating diffusion (which is further connected to the gate of the read out transistor) eliminating lag. The use of intrapixel charge transfer can offer lower noise by enabling the use of correlated double sampling (CDS). The Noble 3T pixel is still sometimes used since the fabrication requirements are less complex. The 3T pixel comprises the same elements as the 4T pixel except the transfer gate and the photodiode. The reset transistor, Mrst, acts as a switch to reset the floating diffusion to VRST, which in this case is represented as the gate of the Msf transistor. When the reset transistor is turned on, the photodiode is effectively connected to the power supply, VRST, clearing all integrated charge. Since the reset transistor is n type, the pixel operates in soft reset. The read out transistor, Msf, acts as a buffer (specifically, a source follower), an amplifier which allows the pixel voltage to be observed without removing the accumulated charge. Its power supply, VDD, is typically tied to the power supply of the reset transistor VRST. The select transistor, Msel, allows a single row of the pixel array to be read by the read out electronics. Other innovations of the pixels such as 5T and 6T pixels also exist. By adding extra transistors, functions such as global shutter, as opposed to the more common rolling shutter, are possible. In order to increase the pixel densities, shared row, four ways and eight ways shared read out, and other architectures can be employed. A variant of the 3T active pixel is the Foveon X3 sensor invented by Dick Merrill. In this device, three photodiodes are stacked on top of each other using planar fabrication techniques, each photodiode having its own 3T circuit. Each successive layer acts as a filter for the layer below it shifting the spectrum of absorbed light in successive layers. By deconvolving the response of each layered detector, red, green, and blue signals can be reconstructed.

A typical two dimensional array of pixels is organized into rows and columns. Pixels in a given row share reset lines, so that a whole row is reset at a time. The row select lines of each pixel in a row are tied together as well. The outputs of each pixel in any given column are tied together. Since only one row is selected at a given time, no competition for the output line occurs. Further amplifier circuitry is typically on a column basis.

The size of the pixel sensor is often given in height and width, but also in the optical format.

There are two types of active pixel sensor (APS) structures, the lateral APS and vertical APS. Here, Cpix is the pixel storage capacitance, and it is also used to capacitively couple the addressing pulse of the "Read" to the gate of TAMP for ON OFF switching. Such pixel readout circuits work best with low capacitance photoconductor detectors such as amorphous selenium.

Many different pixel designs have been proposed and fabricated. The standard pixel uses the fewest wires and the fewest, most tightly packed transistors possible for an active pixel. It is important that the active circuitry in a pixel take up as little space as possible to allow more room for the photodetector. High transistor count hurts fill factor, that is, the percentage of the pixel area that is sensitive to light. Pixel size can be traded for desirable qualities such as noise reduction or reduced image lag. Noise is a measure of the accuracy with which the incident light can be measured. Lag occurs when traces of a previous frame remain in future frames, i. e. the pixel is not fully reset. The voltage noise variance in a soft reset (gate voltage regulated) pixel is , but image lag and fixed pattern noise may be problematic. In rms electrons, the noise is
Hard reset The pixel via hard reset results in a Johnson–Nyquist noise on the photodiode of or , but prevents image lag, sometimes a desirable tradeoff. One way to use hard reset is replace Mrst with a p type transistor and invert the polarity of the RST signal. The presence of the p type device reduces fill factor, as extra space is required between p and n devices; it also removes the possibility of using the reset transistor as an overflow anti blooming drain, which is a commonly exploited benefit of the n type reset FET. Another way to achieve hard reset, with the n type FET, is to lower the voltage of VRST relative to the on voltage of RST. This reduction may reduce headroom, or full well charge capacity, but does not affect fill factor, unless VDD is then routed on a separate wire with its original voltage.

Techniques such as flushed reset, pseudo flash reset, and hard to soft reset combine soft and hard reset. The details of these methods differ, but the basic idea is the same. First, a hard reset is done, eliminating image lag. Next, a soft reset is done, causing a low noise reset without adding any lag. Pseudo flash reset requires separating VRST from VDD, while the other two techniques add more complicated column circuitry. Specifically, pseudo flash reset and hard to soft reset both add transistors between the pixel power supplies and the actual VDD. The result is lower headroom, without affecting fill factor.

A more radical pixel design is the active reset pixel. Active reset can result in much lower noise levels. The tradeoff is a complicated reset scheme, as well as either a much larger pixel or extra column level circuitry.